| Title | Power Dissipation Impact of the Technology Mapping Synthesis on Look-up Table Architectures |
| Publication Type | Conference Proceedings |
| Year of Conference | 2005 |
| Authors | Veredas, FJ, Carrabina, J |
| Conference Name | Proc. 15th International Workshop PATMOS 2005 |
| Volume | Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. |
| Edition | Ed. Springer LNCS 3728 |
| Conference Location | Leuven |
| ISBN Number | 84-9732-439-0 |
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