Deriving Cost Functions from Cell Libraries and Real IC's to real Area-Power-Delay Trade-off in Early Stages of Logic Synthesis.

TitleDeriving Cost Functions from Cell Libraries and Real IC's to real Area-Power-Delay Trade-off in Early Stages of Logic Synthesis.
Publication TypeJournal Article
Year of Publication1997
AuthorsRiera, J, Ribas, L, Velasco, AJ, Carrabina, J
JournalJournal of Systems Architecture
Volume43
Pagination119-122
ISSN0165-6074
Taxonomy upgrade extras: 
Campus d'excel·lència internacional U A B