| Title | Deriving Cost Functions from Cell Libraries and Real IC's to real Area-Power-Delay Trade-off in Early Stages of Logic Synthesis. |
| Publication Type | Journal Article |
| Year of Publication | 1997 |
| Authors | Riera, J, Ribas, L, Velasco, AJ, Carrabina, J |
| Journal | Journal of Systems Architecture |
| Volume | 43 |
| Pagination | 119-122 |
| ISSN | 0165-6074 |
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