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C

J. L. Merino, Terés, L., and Carrabina, J., “A current copying structure for current-mode monotonic digital-to-analog converters”, Proc. 2006 IEEE International Symposium on Circuits and Systems. ISCAS 2006. Kos, 2006.

D

A. Portero, Talavera, G., Carrabina, J., and Cathoor, F., “Data-Dominant Application implementation in Multi-platform for energy-flexibility space Exploration”, Planned for re-submission to the IEEE Transactions on Image Processing, Submitted.

J. Riera, Ribas, L., Velasco, A. J., and Carrabina, J., “Deriving Cost Functions from Cell Libraries and Real IC's to real Area-Power-Delay Trade-off in Early Stages of Logic Synthesis.”, Journal of Systems Architecture , vol. 43 , pp. 119-122, 1997.

J. Ordeix, Parés, S., Martí, P., and Carrabina, J., “Descodificador convolucional a partir de l'algorisme de Viterbi”, I Jornades de Codisseny Hardware Sofware , vol. 26-27. 84-688-2562-X, ISBN, 2003.

J. Carrabina, Ribas, L., Saiz, J., Portero, A., Serra, M., Ordeix, J., and Martí, P., “Descripción de la Computación y su implementación Reconfigurables (Invitada)”, Actas de las 2as Jornadas sobre Computación Reconfigurable y Aplicaciones. Granada, 2002.

A. Lambrechts, Vander Aa, T., Jayapala, M., Leroy, A., Talavera, G., Shickova, A., Barat, F., Mei, B., Catthoor, F., Verkest, D., Deconinck, G., Corporaal, H., Robert, F., and Carrabina, J., “Design Style Case Study for Compute Nodes of a Heterogeneous NoC Platform”, Proc. of IEEE International Real-Time Systems Symposium - RTSS04. Lisboa, 2004.

A. Errachid, Merlos, A., Bausells, B., and Carrabina, J., “Development of ISFET in a commercial CMOS technology.”, Química analítica 1999, vol. 18, pp. 62-64, 1999.

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