Found 124 results
Author Title [ Type(Asc)] Year
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Journal Article
J. Riera, Ribas, L., Velasco, A. J., and Carrabina, J., Deriving Cost Functions from Cell Libraries and Real IC's to real Area-Power-Delay Trade-off in Early Stages of Logic Synthesis., Journal of Systems Architecture , vol. 43 , pp. 119-122, 1997.
A. Portero, Talavera, G., Carrabina, J., and Cathoor, F., Data-Dominant Application implementation in Multi-platform for energy-flexibility space Exploration, Planned for re-submission to the IEEE Transactions on Image Processing, Submitted.
L. Ribas, Riera, J., Pérez, J. M., J. Saiz,, Carrabina, J., and Terés, L., Automatic Pattern Generation for the Electrical Characterization of Digital Modules, Microprocessing and Microprogramming , vol. 39, pp. 255-258, 1993.
G. Talavera, Jayapala, M., Carrabina, J., and Cathoor, F., Address Generation Optimization for Embedded High-Performance Processors: A Survey, Journal of Signal Processing Systems for Signal Image and Video Technology (formerly the Journal of VLSI Signal Processing Systems for Signal Image and Video Technology), 2008.
N. Avellana, Garrido, F., Carrabina, J., Valderrama, E., and Gómez, P., A-3 Implementación VLSI de un modelo coclear, Informática y Automática. , vol. 25, pp. 42-50, 1992.
J. Carrabina and Casalprim, M., A-2 Diseño de un CI para mando a distancia, Mundo Electrónico, vol. 195, pp. 122-125, 1989.
F. Calmon, Fathallah, M., Viverge, P. J., Gontrand, C., Carrabina, J., and Foussier, P., A-13 FPGA and Mixed FPGA-DSP Implementations of Electrical Drive Algorithms Field-Programmable Logic and Applications., Lecture Notes in Computer Science Springer-Verlag Heidelberg, 2002.


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