Publicacions

Found 124 results
Author Title [ Type(Desc)] Year
Filters: Author is Carrabina, J.  [Clear All Filters]
Journal Article
C. Ferrer, Carrabina, J., Deschamps, J. P., Oliver, J., and Valderrama, E., Generador de seqüències de test per circuits integrats NMOS, QÜESTIO, vol. 11, no. 2, pp. 81-91, 1987.
B. Bausells, Carrabina, J., Errachid, A., and Merlos, A., Ion-Sensitive field-effect transistor fabricated in a commercial CMOS technology, Sensors and Actuators B, vol. 57, pp. 56-62, 1999.
J. Carrabina, Lisa, C., Pérez, F., Garrido, N., Avellana, E., and Valderrama, E., J.Carrabina, F. Lisa, C. Pérez, F. Garrido, N. Avellana, E. Valderrama. A-4 Digital neural network system based in new concepts on the recall phase dynamics"., Microprocessing and Microprogramming, vol. 34, pp. 89-92, 1992.
B. Bausells, Carrabina, J., Merlos, A., Bota, S., and Samitier, J., Mechanical sensors integrated in a commercial CMOS technology., Sensors and Actuators A, vol. Vol.62/1-3, pp. 698-704, 1997.
A. Portero, Talavera, G., Carrabina, J., and Cathoor, F., Methodology for Multimedia Applications in Multiplatform Implementation for energy-flexibility space exploration, Planned for re-submission to the IEEE Transactions on Computers, Submitted.
G. Talavera, Portero, A., Raghavan, P., Jayapala, M., Carrabina, J., and Cathoor, F., Power exploration and address generation optimization of multimedia applications on VLIW processors, Planned for re-submission to the IEEE Transactions on Image Processing, Submitted.
E. Mumbrú, Serra, M., Novo, D., Martí, P., and Carrabina, J., Sistema de Sincronització per l’estàndard Hiperlan/2, I Jornades de Codisseny Hardware Sofware. , vol. 26-27, 2003.

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Campus d'excel·lència internacional U A B