Found 124 results
Author Title [ Type(Desc)] Year
Filters: Author is Carrabina, J.  [Clear All Filters]
Journal Article
N. Avellana, Garrido, F., Carrabina, J., Valderrama, E., and Gómez, P., A-3 Implementación VLSI de un modelo coclear, Informática y Automática. , vol. 25, pp. 42-50, 1992.
G. Talavera, Jayapala, M., Carrabina, J., and Cathoor, F., Address Generation Optimization for Embedded High-Performance Processors: A Survey, Journal of Signal Processing Systems for Signal Image and Video Technology (formerly the Journal of VLSI Signal Processing Systems for Signal Image and Video Technology), 2008.
L. Ribas, Riera, J., Pérez, J. M., J. Saiz,, Carrabina, J., and Terés, L., Automatic Pattern Generation for the Electrical Characterization of Digital Modules, Microprocessing and Microprogramming , vol. 39, pp. 255-258, 1993.
A. Portero, Talavera, G., Carrabina, J., and Cathoor, F., Data-Dominant Application implementation in Multi-platform for energy-flexibility space Exploration, Planned for re-submission to the IEEE Transactions on Image Processing, Submitted.
J. Riera, Ribas, L., Velasco, A. J., and Carrabina, J., Deriving Cost Functions from Cell Libraries and Real IC's to real Area-Power-Delay Trade-off in Early Stages of Logic Synthesis., Journal of Systems Architecture , vol. 43 , pp. 119-122, 1997.
A. Errachid, Merlos, A., Bausells, B., and Carrabina, J., Development of ISFET in a commercial CMOS technology., Química analítica 1999, vol. 18, pp. 62-64, 1999.
C. J. Pérez Vicente, Carrabina, J., and Valderrama, E., Discrete learning in feed forward neural networks, International Journal of Neural Systems , vol. Vol. 2 , no. 4, p. 323 329, 1992.


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