Found 14 results
Author Title [ Type(Desc)] Year
Filters: Author is Joven, J.  [Clear All Filters]
Conference Proceedings
E. Fernández-Alonso, Castells-Rufas, D., Risueño, S., Carrabina, J., and Joven, J., Minimization of Router Resource Usage for Small Area NoC Designs, IEEE 2010 International Conference on Electronics, Circuits, and Systems (ICECS 2010). . Athens (Grecia), 2010.
D. Castells-Rufas, Joven, J., Risueño, S., Fernández-Alonso, E., Carrabina, J., William, T., and Mix, H., MPSoC Performance Analysis with Virtual Prototyping Platforms., PSTI 2010 . San Diego, USA. , 2010.
E. Fernández-Alonso, Risueño, S., Castells-Rufas, D., Joven, J., and Carrabina, J., Multiprocesador de 16 núcleos soft-core con arquitectura NoC., JCRA 2010. Valencia, Spain, 2010.
(eds.)D. Castells-Rufas, Joven, J., Risueño, S., Fernández-Alonso, E., and Carrabina, J., NocMaker: A cross-platform open-source design space exploration tool for networks on chip, INA-OCMC Workshop. Paphos, Cyprus , 2009.
J. Joven, Angiolini, F., Castells-Rufas, D., and Carrabina, J., QoS-ocMPI: QoS-aware on-chip Message Passing Library for NoC-based Many-Core MPSoCs., PMEA. Viena, Austria, 2010.
(eds.)D. Castells-Rufas, Joven, J., and Carrabina, J., A validation and performance evaluation tool for protonoc, International Symposium on System-on-Chip 2006. Tampere, 2006.
J. Joven, Font-Bach, D., Castells-Rufas, D., Martínez, R., Terés, L., and Carrabina, J., xENoC - An eXperimental Network-on-Chip Environment for parallel distributed computing on NoC-based MPSoC architectures, 16th Euromicro Int. Conf. on Parallel, Distributed and network-based Processing (PDP’08). Toulouse, Francia, 2008.


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