Publicacions

Found 10 results
Author Title Type [ Year(Asc)]
Filters: First Letter Of Title is P and Author is Carrabina, J.  [Clear All Filters]
2005
A. Lambrechts, Raghavan, P., Leroy, A., G., T., Vander, T., Jayapala, M., Cathoor, F., Verkest, D., Deconinck, G., Corporaal, H., and Carrabina, J., Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application, Proc. of IEEE 16th Int. Conference on Application-specific Systems, Architectures and Processors - ASAP 2005. Samos, Greece, 2005.
F. J. Veredas and Carrabina, J., Power Dissipation Impact of the Technology Mapping Synthesis on FieldProgrammable Gate Arrays, V Jornadas de Computación Reconfigurable y Aplicaciones. JCRA 2005. Integrado en CEDI2005. Granada, 2005.
F. J. Veredas and Carrabina, J., Power Dissipation Impact of the Technology Mapping Synthesis on Look-up Table Architectures, Proc. 15th International Workshop PATMOS 2005, vol. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. . Leuven, 2005.

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